Sr/ Staff Design Verification Engineer (Full Chip), Singapore

Key Responsibilities Execute SoC-based verification at full-chip. Develop test plans at block, sub-system, and chip level. Write testbench using SystemVerilog and UVM and ensure high code coverage. Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage. Perform root-cause analysis and debug tofix identified issues Write C-based lib packages and tests. Ensure that verification quality meets or exceeds project requirements. Key Requirements Bachelor Degree in Electronics or equivalent with 10 years+ relevant experience in block, sub-system, and full-chip design verification Experienced in ARM M/RISC-V (Preferred), IP Verification, SoC Verification and Low Power (CPF/UPF) Verification Track record to deliver multiple chips functioning to Specification. C-based verification in an SoC environment is required Experience with ARM processor-based designs and low-power design techniques is a plus.
Ethos Search Associates EA Licence No: 13C6655 EA Reg No: R1109557 Rose