Standard Cell Library Design Engineer, Yishun
Standard Cell Library Design Engineer, Yishun
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Yishun
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Posted: less than a week ago
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Description
Job Description:
Job Description:
Broadcom's Central Engineering Group builds the Foundation IP that powers Broadcom's leading silicon product families. In this position, the successful candidate will be part of the team responsible for the design, development and delivery of standard cell library foundation IP
Job Responsibilities:
Generate and verify library EDA models Run regression and quality checks on library deliverables Interface with design teams to support their requirements Implement process automation for consistent and faster throughput (scripting)
Key Requirements:
Digital or mixed-signal circuit design knowledge Understanding of cell layout or physical design Understanding of FinFet, RibbonFet/GAA process nodes Understanding of verilog, lef, liberty and other industry standard EDA models Familiarity with EDA tools used in STA and PnR Experience with .lib syntax including NLDM/CCS/LVF is a plus Experience with Virtuoso, Cadence Skill programming, scripting using Unix, Perl, TCL or Python is strongly desired
Qualifications & Experience:
Bachelor's in Electrical/Electronic or Computer Engineering and 2+ years of related experience / Candidates with Masters and 1+ years of related experience / Fresh graduates with good GPA will be considered Singapore Citizen/PR only
Additional Qualifications:
Excellent written and verbal communication skills Collaborate and work within and across teams
R024593
Job Description:
Broadcom's Central Engineering Group builds the Foundation IP that powers Broadcom's leading silicon product families. In this position, the successful candidate will be part of the team responsible for the design, development and delivery of standard cell library foundation IP
Job Responsibilities:
Generate and verify library EDA models Run regression and quality checks on library deliverables Interface with design teams to support their requirements Implement process automation for consistent and faster throughput (scripting)
Key Requirements:
Digital or mixed-signal circuit design knowledge Understanding of cell layout or physical design Understanding of FinFet, RibbonFet/GAA process nodes Understanding of verilog, lef, liberty and other industry standard EDA models Familiarity with EDA tools used in STA and PnR Experience with .lib syntax including NLDM/CCS/LVF is a plus Experience with Virtuoso, Cadence Skill programming, scripting using Unix, Perl, TCL or Python is strongly desired
Qualifications & Experience:
Bachelor's in Electrical/Electronic or Computer Engineering and 2+ years of related experience / Candidates with Masters and 1+ years of related experience / Fresh graduates with good GPA will be considered Singapore Citizen/PR only
Additional Qualifications:
Excellent written and verbal communication skills Collaborate and work within and across teams
R024593
Highlights
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Company nameBroadcom
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Job positionStandard Cell Library Design Engineer
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